Clair Webb is an Intel Fellow and Director of Circuit Technology in Intel's Technology and Manufacturing Group, based in Hillsboro, Ore. He is a member of the Logic Technology Development Design Group, responsible for defining and developing circuit directions and optimizing the manufacturing process technology for high-performance microprocessor products.
Webb joined Intel in February 1976 and was responsible for designing and working on all generations of DRAMs from 16 Kbits to 1 Mbit. Webb subsequently worked on SRAM and cache memory designs in addition to five Intel microprocessor designs.
Prior to joining Intel, Webb worked on DRAM design and testing at Motorola.
Webb received a bachelor's degree in Electrical Engineering from Utah State University and is a member of the IEEE. He was born in Richmond, Utah. |