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Daniel Casaletto is vice president of the Digital Enterprise Group and director of Microprocessor Architecture and Planning for Intel Corporation.
Previously, Casaletto was the general manager for the Enterprise Microprocessor Division (EMD) leading the development of advanced Enterprise Architecture microprocessors. Product responsibilities included Intel� Xeon and Itanium� families. EMD development teams reside across the United States, as well as India.
Prior to joining Intel, Casaletto was vice president of the Alpha Development Group at Compaq Computer Corporation. He was responsible for the development and delivery of microprocessors and supporting technologies for entry-level server systems. His organization, made up of hardware and software engineers, developed microprocessors, related chipsets, motherboards, firmware, IC package design and CAD. His group also oversaw microprocessor production, and worked closely with the semiconductor foundries.
With more than 25 years of combined service with Compaq and Digital Equipment Corporation, Casaletto has extensive management experience in the engineering field. From 1994 to 1998, Casaletto held the following positions at Digital: vice president, Digital Semiconductor Engineering; vice president; and product line manager for emerging technologies, which included Intel� StrongARM, Intel� 2700G Multimedia Accelerator Reference System, and Intel� 41210 Serial to Parallel PCI Bridge chips; and vice president and product line manager for the Alpha Business Segment.
Prior to joining Digital, Casaletto spent three years at RCA designing communication systems for militarized command and control applications.
Casaletto received a bachelor's degree and a master's degree in electrical engineering from Northeastern University. He also completed the Yale Executive Management Program in 1992. | 